1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a double diffused MOS (DMOS) field effect transistor with improved electrical characteristics and a method for manufacturing the same.
2. Description of the Related Art
DMOS field effect transistors are typically used for power devices which require a high voltage and fast switching and can be classified into a vertical type and a horizontal type according to the direction of current flow. The DMOS field effect transistor is manufactured using a planar diffusion technology. Namely, a p-type body region and n-type high density source regions are formed by a double-diffusion process in which ions are implanted through a window defined by a polysilicon gate and are drive-in-diffused.
FIG. 1 is a sectional view showing such a DMOS field effect transistor. The device shown in FIG. 1 is an example of a vertical-type DMOS field effect transistor in which current flows in a vertical direction.
Referring to FIG. 1, an n-type high density semiconductor substrate 10 is used as a drain region. An n-type low density epitaxial layer 11 formed on the n-type high density semiconductor substrate is used as a drift region. A p-type body region 12 is formed within the epitaxial layer 11. A p-type high density sink region 13 and an n-type high density source region 14 are formed to be adjacent to each other within the body region 12. A gate electrode 16 is formed over the channel region of the body region 12, with a gate insulating layer 15 interposed between the gate electrode 16 and the body region 12. A source electrode 18 is formed to be electrically connected to the source region 14, and a drain electrode 19 is formed to be electrically connected to the semiconductor substrate 10. An insulating layer 17 for insulating the gate electrode 16 from the source electrode 18 is formed on the gate electrode 16.
The body region 12 is formed by implanting p-type impurity ions using the gate electrode 16 as an ion implantation mask and by drive-in-diffusing the implanted p-type impurity ions. The source region 14 is formed by implanting n-type impurity ions using the gate electrode 16 and a mask pattern (not shown) as ion implantation masks and drive-in-diffusing the implanted n-type impurity ions.
FIG. 2 is a sectional view showing the region A of FIG. 1, i.e., enlarged surfaces of the source region 14 and the body region 12. FIG. 3 is a graph showing a doping profile along the line B-B' of FIG. 2.
Referring to FIG. 2, the depth of diffusion of impurity ions in the horizontal direction is about 70% of the diffusion depth in the vertical direction. Namely, when the diffusion depth of the body region 12 in the vertical direction is D.sub.p, the diffusion depth in the horizontal direction is 0.7 D.sub.p. When the diffusion depth of the source region 14 in the vertical direction is D.sub.s, the diffusion depth in the horizontal direction becomes 0.7 D.sub.s. Therefore, when a voltage having a magnitude no less than the threshold voltage for the device is applied to the gate electrode 16, the length of a formed channel is 0.7(D.sub.p -D.sub.s).
As shown in FIG. 3, in a conventional DMOS field effect transistor, the doping density of the impurity ions in the body region 12 and the source region 14 becomes less as the horizontal depth of diffusion of the body region 12 and the source region 14 becomes larger. In particular, the peak doping density (marked with an arrow in FIG. 3) of the p-type impurity ions is shown due to compensation with the n-type impurity ions implanted into the source region 14 in a portion adjacent to the source region 14 in the body region 12. It is well known that the peak doping density greatly affects the threshold voltage of a device. The threshold voltage becomes larger as the peak doping density becomes larger.
When the source electrode of the device is grounded and a positive voltage is applied to the drain electrode, the junction between the p-type body region 12 and the n-type epitaxial layer 11 is reverse biased. Accordingly, depletion occurs in the two regions 12 and 14. When the body region 12 is entirely depleted, the n-type source region and the n-type epitaxial layer are shorted. Accordingly, punch-through breakdown occurs. In general, since the depletion depth becomes smaller as the doping density becomes higher, the doping density in the channel should be increased in order to increase the punch-through breakdown voltage. However, as mentioned above, when the doping density in the channel is increased, the peak doping density in the body region 12 is increased. Therefore, the threshold voltage is increased, thus deteriorating the electrical characteristics of the device.